The size and complexity of integrated circuits (IC) has made conventional circuit simulation methods too computationally expensive to use for circuit verification. For example, conventional circuit reduction methods based on Asymptotic Waveform Evaluation and other algorithms have provided a good accuracy/speed trade-off, and have been used extensively in recent years for timing and noise analysis. However, because of the inherently large size and complexity of the circuit, even these techniques to create circuit models alone are too computationally expensive for analysis of an entire microprocessor.
For noise analysis, component circuits (nets) in a circuit under simulation (referred to as a noise circuit) is classified into two types of nets: victim and aggressor nets. A victim net is a circuit on which noise is injected from one or more surrounding circuits which are capacitively coupled to the victim net. The surrounding circuits affecting the victim net are referred to as its aggressor nets (also referred to as aggressor circuits, or simply aggressors). FIG. 1 schematically illustrates an example of a victim net 10 and two neighboring aggressor nets 12 and 14. For example, switching operations on the aggressor nets may cause a noise pulse onto a signal in the victim net 10, for example, injecting a glitch into the victim net 10 as shown in FIG. 1. It should be noted that a victim net in one noise simulation, in which the noise on the victim net is to be calculated, can be one of the aggressor nets in a different noise simulation to calculate noise effects on another victim net.
A victim net can have hundreds or thousands of aggressor nets. Since the time for analyzing a circuit using reduction methods is roughly proportional to the number of nodes in the circuit cubed i.e., (number of nodes)3, analysis of such a large circuit would require an impracticably long run time. For example, when a victim net is coupled to a clock net, the clock-aggressor can be hundreds of times as large as the victim net. Spending a large amount of execution time analyzing a noise circuit with excessively large aggressor nets does not necessarily increase the accuracy of the analysis. The situation is further exaggerated when the aggressors in question are only weakly coupled to the victim net, and therefore contribute only a small amount of noise.
In reducing the circuit size for noise analysis, there is a fundamental trade-off between analysis “pessimism” (apart from the reality and getting closer to the worst case scenario) and the complexity of the circuit that is used to model noise. That is, simpler models result in shorter run time, but it is typically at the expense of increased pessimism. A conventional method uses a fast and crude analysis to determine aggressor nets that only contribute a small amount of noise to the victim net. Such “weak” aggressor nets are modeled into a simplified form referred to as a “virtual attacker,” so as to reduce the size of the noise circuit. These virtual attackers are modeled without resistance, effectively representing the aggressor as a single node which is capacitively coupled to the victim and attached to a voltage source. FIG. 2 schematically illustrates an example including a modeled virtual attacker. In this example, similarly to FIG. 1, the noise circuit includes a victim net 20 and two aggressor nets 22 and 24. The aggressor 22 has been reduced to a simplified virtual capacitive attacker with a voltage source and capacitances. The aggressor 24 remains in its original form.
However, the conventional virtual attacker approach preserves pessimism in the analysis, because the aggressor net is guaranteed to switch as fast as or faster than it would if modeled fully. In addition, the conventional virtual attacker approach only considers the aggressor's effect on noise when selecting virtual attackers. However, there are cases where a victim net is coupled to a large number of small, weakly coupled aggressors, and a few large, strongly coupled aggressors. In such cases, the cumulative noise effect of the many small aggressors may be as great as one of the large aggressors. Furthermore, with respect to the noise circuit size, the full RC model of every small aggressor may contribute less to the noise circuit size than a full RC model of a large aggressor. In these cases the conventional virtual attacker approach will produce a circuit model that is larger than necessary, more pessimistic than necessary, or both.